FPGA-implementation of PID-controller by differential evolution optimization

dc.contributor.authorHanhila, Mika
dc.contributor.authorMantere, Timo
dc.contributor.authorAlander, Jarmo T.
dc.contributor.departmentfi=Ei tutkimusalustaa|en=No platform|-
dc.contributor.facultyfi=Tekniikan ja innovaatiojohtamisen yksikkö|en=School of Technology and Innovations|-
dc.contributor.orcid0000-0001-9266-1006-
dc.contributor.organizationfi=Vaasan yliopisto|en=University of Vaasa|
dc.date.accessioned2019-10-16T07:38:55Z
dc.date.accessioned2025-06-25T12:19:23Z
dc.date.available2019-10-16T07:38:55Z
dc.date.issued2018-11-08
dc.description.abstractWe will describe an FPGA implementation of PID-controller that uses differential evolution to optimize the coefficients of the PID controller, which has been implemented in VHDL. The original differential evolution algorithm was improved by ranking based mutation operation and self-adaptation of mutation and crossover parameters. Ranking-based mutation operation improves the quality of solution, convergence rate and success of optimization. Due to the self adaptive control parameters, the user does not have to estimate the mutation and crossover rates. Optimization have been performed by calculating for each generation fitness value by means of trial parameters. The final optimal parameters are selected based on the minimum fitness.-
dc.description.reviewstatusfi=vertaisarvioitu|en=peerReviewed|-
dc.format.bitstreamtrue
dc.format.contentfi=kokoteksti|en=fulltext|-
dc.format.extent8-
dc.format.pagerange395-402-
dc.identifier.olddbid10432
dc.identifier.oldhandle10024/9752
dc.identifier.urihttps://osuva.uwasa.fi/handle/11111/43
dc.identifier.urnURN:NBN:fi-fe2019101633252-
dc.language.isoeng-
dc.publisherDe Gruyter-
dc.relation.doi10.1515/eng-2018-0038-
dc.relation.ispartofjournalOpen Engineering-
dc.relation.issn2391-5439-
dc.relation.issue1-
dc.relation.urlhttps://doi.org/10.1515/eng-2018-0038-
dc.relation.volume8-
dc.rightsCC BY-NC-ND 4.0-
dc.source.identifierScopus: 85056845851-
dc.source.identifierWOS: 000451149300002-
dc.source.identifierhttps://osuva.uwasa.fi/handle/10024/9752
dc.subjectAdaptive PID Controllers-
dc.subjectdifferential evolution-
dc.subjectField Programmable Gate Array (FPGA)-
dc.subjectoptimization-
dc.subjectranking-based mutation operation-
dc.subjectself-adaptive control parameters-
dc.subjectVHDL-
dc.subject.disciplinefi=Automaatiotekniikka|en=Automation Technology|-
dc.titleFPGA-implementation of PID-controller by differential evolution optimization-
dc.type.okmfi=A2 Katsausartikkeli tieteellisessä aikakauslehdessä|en=A2 Peer-reviewed review article|sv=A2 Översiktsartikel i en vetenskaplig tidskrift|-
dc.type.publicationarticle-
dc.type.versionpublishedVersion-

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